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preliminary 7832b?aero?11/09 features ? operating voltage: 5v ? access time: 40 ns ? very low power consumption ? active: 275 mw (max) ? standby: 10 mw (typ) ? wide temperature range: -55 ? c to +125 ? c ? 400 mils width packages: fp32 and sb32 ? ttl compatible inputs and outputs ? asynchronous ? no single event latch-up below a let threshold of 80 mev/mg/cm 2 @125c ? tested up to a total dose of 300 krads (si) according to mil std 883 method 1019 ? esd better than 4000v ? deliveries at least equivalent to qml procurement according to mil-prf38535 description the at65609ehv is a very low power cmos static ram organized as 131072 x 8 bits. utilizing an array of six transistors (6t) memory cells, the at65609ehv com- bines an extremely low standby supply curren t with a fast access time at 40 ns over the full military temperature range. the high stability of the 6t cell provides excellent protection against soft errors due to noise. the at65609ehv is processed according to th e methods of the latest revision of the mil prf 38535 or escc 9000. it is manufactured on the same process as the mh1rt rad-hard sea of gates series. rad. tolerant 128k x 8 5-volts very low power cmos sram at65609ehv
2 7832b?aero?11/09 at65609ehv preliminary block diagram pin configuration 32-lead dil side-brazed or 32-lead flat pack - 400 mils note: nc pin is not bonded internally. so, it can be connected to gnd or vcc. 16 12 8 15 14 13 11 10 9 7 6 5 4 3 17 21 25 18 19 20 22 23 24 26 27 28 29 30 gnd i/o2 i/o1 i/o0 a0 a1 a2 a3 a4 a5 a6 a7 a12 nc i/o3 i/o4 i/o5 i/o6 i/o7 a10 a11 a9 a8 a13 vcc oe cs1 we 2 1 31 32 a16 a14 a15 cs2
3 7832b?aero?11/09 at65609ehv preliminary pin description table 1. pin names table 2. truth table note: l = low, h = high, x = h or l, z = high impedance. names description a0 - a16 address inputs i/o0 - i/o7 data input/output cs1 chip select 1 cs2 chip select 2 we write enable oe output enable vcc power gnd ground cs1 cs2 w e oe inputs/ outputs mode hxxx z deselect/power-down xlxx z deselect/power-down l h h l data out read l h l x data in write lhhh z output disable
4 7832b?aero?11/09 at65609ehv preliminary electrical characteristics absolute maximum ratings military operating range recommended dc op erating conditions capacitance note: 1. guaranteed but not tested. supply voltage to gnd potential:..........................-0.5v + 7.0v dc input voltage: ..............................gnd - 0.5v to vcc + 0.5 dc output voltage high z state: ........gnd - 0.5v to vcc + 0.5 storage temperature: .......................................-65 ? c to +150 ? c output current into outputs (low): .................................. 20 ma electro static discharge voltage with hbm method (mil std 883d method 3015): .. .............. ................. > 4000v electro static discharge vo ltage with socketed cdm method (ansi/esd sp5.3.2-2004): ........ .............. ................. > 1000v *note: stresses beyond those listed under "abso- lute maximum ratings? may cause perma- nent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specif ication is not implied. exposure between recommended dc operating and absolute maximum rating conditions for extended periods may affect device reliability. operating voltage operating temperature 5v + 10% -55 ? c to + 125c ? parameter description minimum typical maximum unit v cc supply voltage 4.5 5.0 5.5 v gnd ground 0.0 0.0 0.0 v v il input low voltage gnd - 0.5 0.0 0.8 v v ih input high voltage 2.2 ? vcc + 0.5 v parameter description minimum typical maximum unit cin (1) input low voltage ??8pf cout (1) output high voltage ??8pf
5 7832b?aero?11/09 at65609ehv preliminary dc parameters dc test conditions ta = -55 c to + 125 c; vss = 0v; v cc = 4.5v to 5.5v consumption symbol description minimum typical maximum unit iix (1) 1. gnd < vin < v cc , gnd < vout < v cc output disabled. input leakage current -1 ? 1 a ioz (1) output leakage current -1 ? 1 a vol (2) 2. v cc min. iol = 8 ma output low voltage ??0.4v voh (3) 3. v cc min. ioh = -4 ma. output high voltage 2.4 ? ? v symbol description at65609ehv unit value iccsb (1) 1. cs1 > v ih or cs2 < v il and cs1 < v il . standby supply current 5mamax iccsb1 (2) 2. cs1 > v cc - 0.3v or, cs2 < gnd + 0.3v and cs1 < 0.2v. standby supply current 3mamax iccop (3) 3. f = 1/tavav, iout = 0 ma, we = oe = v cc , vin = gnd or v cc , v cc max, cs1 = v il , cs2= v ih dynamic operating current 50 ma max
6 7832b?aero?11/09 at65609ehv preliminary ac parameters ac test conditions input pulse levels: ............................................................................................... gnd to 3.0v input rise/fall times: ........................................................................................................ . 5 ns input timing reference levels: ......................................................................................... 1.5v output loading iol/ioh (see figure 1 and figu re 2): ................................................... +30 pf ac test loads waveforms figure 1 figure 2 figure 3
7 7832b?aero?11/09 at65609ehv preliminary data retention mode atmel cmos ram?s are designed with battery backup in mind. data retention voltage and sup- ply current are guaranteed over temperature. the following rules ensure data retention: 1. during data retent ion chip select cs1 must be held high within vcc to vcc -0.2v or, chip select cs2 must be held down within gnd to gnd +0.2v. 2. output enable (oe ) should be held high to keep the ram outputs high impedance, mini- mizing power dissipation. 3. during power up and power-down transitions cs1 and oe must be kept between vcc + 0.3v and 70% of vcc, or with cs2 between gnd and gnd -0.3v. 4. the ram can begin operation > tr ns after vcc reaches the minimum operation volt- ages (4.5v). timing data retention characteristics notes: 1. tavav = read cycle time 2. cs1 = v cc or cs2 = cs1 = gnd, vin = gnd/ v cc , this parameter is only tested at v cc = 2v. parameter descr iption minimum typical ta = 25 ? c maximum unit vccdr v cc for data retention 2.0 ? ? v tcdr chip deselect to data retention time 0.0 ? ? ns tr operation recovery time tavav (1) ??ns iccdr1 (2) data retention current at 2.0v ?11.5ma iccdr2 (2) data retention current at 3.0v ?1.52ma
8 7832b?aero?11/09 at65609ehv preliminary write cycle note: parameters guarant eed, not tested, with output loading 5 pf. write cycle 1 w e controlled, oe high during write symbol parameter at65609ehv unit value tavaw write cycle time 35 ns min tavwl address set-up time 0nsmin tavwh address valid to end of write 30 ns min tdvwh data set-up time 20 ns min te1lwh cs1 low to write end 30 ns min te2hwh cs2 high to write end 30 ns min twlqz write low to high z (1) 12 ns max twlwh write pulse width 30 ns min twhax address hold from to end of write 3nsmin twhdx data hold time 0nsmin twhqx write high to low z (1) 0nsmin
9 7832b?aero?11/09 at65609ehv preliminary write cycle 2 w e controlled, oe low write cycle 3 c s1 or cs2 controlled note: the internal write time of the me mory is defined by the overlap of cs1 low and cs2 high and w e low. both signals must be actived to initiate a write and either signal can terminate a write by going in actived. the data input setup and hold ti ming should be referenced to the actived edge of the signal that terminates the writ e. data out is high impedance if oe = v ih .
10 7832b?aero?11/09 at65609ehv preliminary read cycle note: 1. parameters guaranteed, not tested, with output loading 5 pf. symbol parameter at65609ehv unit value tavav read cycle time 40 ns min tavqv address access time 40 ns max tavqx address valid to low z (1) 3nsmin te1lqv chip-select1 access time 40 ns max te1lqx cs1 low to low z (1) 3nsmin te1hqz cs1 high to high z (1) 15 ns max te2hqv chip-select2 access time 40 ns max te2hqx cs2 high to low z (1) 3nsmin te2lqz cs2 low to high z (1) 15 ns max tglqv output enable access time 12 ns max tglqx oe low to low z (1) 0nsmin tghqz oe high to high z (1) 10 ns max
11 7832b?aero?11/09 at65609ehv preliminary read cycle 1 address controlled (cs1 = oe low, cs2 = we high) read cycle 2 c s1 controlled (cs2 = we high) read cycle 3 cs2 controlled (we high, cs1 low)
12 7832b?aero?11/09 at65609ehv preliminary ordering information note: 1. contact atmel for availability. part number temperature range speed package flow at65609ehv-c940-e (1) 25 ? c 40 ns sb32.4 engineering samples at65609ehv-dj40-e (1) 25 ? c 40 ns fp32.4 at65609ehv-c940mq -55 ? to +125 ? c 40 ns sb32.4 mil level b at65609ehv-dj40mq -55 ? to +125 ? c 40 ns fp32.4 at65609ehv-c940sv -55 ? to +125 ? c 40 ns sb32.4 space level b at65609ehv-dj40sv -55 ? to +125 ? c 40 ns fp32.4 at65609ehv-c940sr -55 ? to +125 ? c 40 ns sb32.4 space level b rha AT65609EHV-DJ40SR -55 ? to +125 ? c 40 ns fp32.4
13 7832b?aero?11/09 at65609ehv preliminary package drawings 32-lead flat pack 400 mils
14 7832b?aero?11/09 at65609ehv preliminary 32-lead side braze 400 mils
15 7832b?aero?11/09 at65609ehv preliminary document revision history changes from 7832a to 7832b 1. page 1 : total dose value updated and esd item added 2. page 5 : esd hbm improved and esd socketed cdm added 3. page 6 : note 3 of consumption table updated 4. page 13 : ordering information section updated
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